Carvin_DSP_System_Module_Schematic.pdf

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R3.C
10K
+5VDC
TLC2272
1
IN +
H1-1
C1
10uf
+
8
10K
R3.B
R3.A
10k
2
3
A1.A
+
4
!-
10uf
OUT+
H1-3
C4
H1-4
OUT-
IN+
AUX IN +
C5
C6
+5VDC
PWR DWN
.1µF
5
OUT- OUT+
DAC Vdd
DAC Vmid
DAC GND
RESET
DGTL Vdd
DIN
DOUT
FS
MON OUT
!AUX IN -
ADC Vdd
ADC Vmid
ADC GND
SUBS
DGTL GND
EOC
7
8
9
23
22
21
20
19
C8
.1µF
C7
.1µF
JMP3
HOLDA
HOLD/INT1
INT2
INT3
NMI
RS
BIO
XF
TOUT
CLKR
CLKX
FSR
FSX
DR
DX
X1
CLKIN/X2
DIV1
DIV2
CLKOUT1
PLL5V
IO0
IO1
IO2
IO3
TX
RX
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
10
GND
C9
.1µF
GROUND
UNREGULATED
SUPPLY
H2-2
+14/24V
H2-4
+5VDC
H2-3
+5VDC
U4
8 Mhz
H4-1
H4-2
DIGITAL I/O
H4-3
H4-4
R11
H2-1
JMP4
6.8k
R10
3k
10
MUTE~
14
JMP1
+14/24V
R4
22Ω
5W
+5VDC
N/U
U10
7805
+
+
+
+5VDC
1
3
C10
1000µF
C11
.1µF
C12
.1µF
C13
.1µF
C21
.1µF
C14
.1µF
C16
.1µF
C17
.1µF
C18
.1µF
C19
.1µF
2
U6.A
GND
+
IN -
+
H1-2
C20
C2
10uf
+5VDC
+5VDC
U3
1
2
MR
WDO
8
H6.B
H6.A
R2.D
10k
VCC RST 7
3
6
GND WDI
4 PFI PFO 5
ADM705
TEST POINT
D0
D1
D2
D3
D4
D5
D6
D7
11
12
13
15
16
17
18
19
O1
O2
O3
O4
O5
O6
O7
O8
+5VDC
U5
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
10
9
8
7
6
5
4
3
25
24
21
23
2
26
27
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
1
26
2
23
21
24
25
3
4
5
6
7
U8
A14
A13
A12
A11
A10
A9
A8
A7
R2.A
R3.D
10k
10K
6
5
R2.B
10K
!-
+
A1.B
7
JMP5
C3
+5VDC
28 VCC
14
GND
+
10uf
+
T
M
S
2
7
C
2
5
6
10uf
+5VDC
U2
4
3
2
1
28
27
26
25
24
+5VDC
+5VDC
+5VDC
R1.B
10K
U1
R1.E
10k
6
18
19
20
17
100
99
98
92
84
87
85
89
86
90
13
12
3
5
15
10
+5VDC
CE 20
OE 22
VPP 1
.1µF
6
10
11
T
L
C
3
2
0
A
C
0
2
15
!IN-
TMS320C203-PZ
SCLK MCLK FC0
FC1
FSD M/S
12
13
14
16
17
18
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
55
56
57
58
60
61
62
64
66
67
68
69
71
72
73
74
52
53
51
46
47
45
44
49
+5VDC
R6.D
10K
8
9
I
A6
D
T
A5
7
A4
1
2
A3
5
27
6
A2
WE
22
A1
OE
20
A0
CE1
14
28
19
D7
18
D6
17
D5
16
D4
15
D3
13
D2
12
D1
11
D0
D7
D6
D5
D4
D3
D2
D1
D0
VCC
+5VDC
R5.F 10K
R5.E 10K
R5.D 10K
R5.C 10K
R5.B 10K
41
40
39
38
36
34
33
32
31
29
28
27
26
24
23
22
91
75
63
50
35
16
11
7
4
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
4
5
13
U6.B
6
12
U6.C
11
R5.A 10K
+5VDC
R6.F 10K
1
2
3
4
5
6
7
8
9
10
9
U7
H3-1
U6.D
74AHCT00
8
19
EO2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
VCC
OE1
A1
A2
A3
A4
A5
A6
A7
R6.E 10K
H3-2
H3-3
H3-4
H3-5
H3-6
H3-7
H3-8
H3-9
H3-10
E0
E1
E2
E3
E4
E5
E6
E7
N/U
Rotary
Encoder /
Digital
Input
IS
PS
DS
STRB
R/W
RD
WE
READY
+5VDC
U9
D0
D15
D14
D13
D12
D11
D10
D9
D8
D1
D2
D3
D4
D5
D6
D7
+5VDC
VCC
18
17
16
15
14
13
12
1
26
R6.A 10K +5VDC
2
23
21
24
B R
43
TEST
TRST
TMS
TDI
TCK
TDO
EMU0
EMU1/OFF
1
79
81
80
78
82
76
77
R1.F
10K
R1.D
+5VDC
10K
R1.C
10K
R1.A
10K
96
97
8
9
93
95
E7
E8
E5
E6
E4
E2
E1
25
3
4
5
6
7
8
9
28
19
A14
D7
18
A13
D6
17
A12
D5
16
A11
D4
15
A10
D3
13
A9
D2
12
A8
D1
11
A7
D0
I
A6
D
T
A5
7
A4
1
2
A3
5
27
6
A2
WE
22
A1
OE
20
A0
CE1
7
4
H
C
T
5
4
0
A
11 Y8
GND
A8
BOOT
C15
.1µF
94
88
83
70
65
59
54
48
42
37
30
25
21
14
2
C
ARVIN
DRAWN BY:
12340 World Trade Drive
San Diego, CA 92128
(619) 487-1600
FAX 487-6629
DSP SYSTEM MODULE
J. THOMAS
DATE:
10JUL96
APPROVED:
DATE:
PCB
NO:
ASSY.
NO:
30-32203
80-32203
J. THOMAS
REV:
E
E
2MAY97
REV:
REVISED BY:
DATE:

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