SBC511.DOC

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EQN2JED -- Boolean Logic to JEDEC file assembler (Version 1.10)
Copyright (R) National Semiconductor Corporation 1990

Document file for SBC511.eqn
Device: 22V10


Pin   Label               Type
---   -----               ----
1     A9                  com input
2     A10                 com input
3     A11                 com input
4     A12                 com input
5     A13                 com input
6     A14                 com input
7     A15                 com input
8     rd                  com input
9     wr                  com input
10    pgm                 com input
11    psen                com input
12    gnd                 ground pin
13    A8                  unused
14    rw                  pos,trst,com output
15    EN                  pos,trst,com output
16    rrd                 pos,trst,com output
17    rwr                 pos,trst,com output
18    r_cs                pos,trst,com output
19    erd                 pos,trst,com output
20    ewr                 pos,trst,com output
21    CS_FA00             pos,trst,com output
22    CS_FC00             pos,trst,com output
23    CS_FE00             pos,trst,com output
24    vcc                 power pin

EQN2JED -- Boolean Logic to JEDEC file assembler (Version 1.10)
Copyright (R) National Semiconductor Corporation 1990

Device Utilization:

No of dedicated inputs used               : 11/12 (91.7%)
No of feedbacks used as dedicated outputs : 10/10 (100.0%)

		------------------------------------------
		Pin   Label                 Terms Usage
		------------------------------------------
		23    CS_FE00               1/9   (11.1%)
		22    CS_FC00               1/11  (9.1%)
		21    CS_FA00               8/13  (61.5%)
		20    ewr                   2/15  (13.3%)
		19    erd                   2/17  (11.8%)
		18    r_cs                  2/17  (11.8%)
		17    rwr                   2/15  (13.3%)
		16    rrd                   2/13  (15.4%)
		15    EN                    2/11  (18.2%)
		14    rw                    1/9   (11.1%)
		------------------------------------------
		Total                      33/132 (25.0%)
		------------------------------------------

EQN2JED -- Boolean Logic to JEDEC file assembler (Version 1.10)
Copyright (R) National Semiconductor Corporation 1990

                            Chip diagram (DIP)

                             ._____    _____.
                             |     \__/     |
                          A9 |  1        24 | vcc
                         A10 |  2        23 | /CS_FE00
                         A11 |  3        22 | /CS_FC00
                         A12 |  4        21 | /CS_FA00
                         A13 |  5        20 | /ewr
                         A14 |  6        19 | /erd
                         A15 |  7        18 | /r_cs
                         /rd |  8        17 | /rwr
                         /wr |  9        16 | /rrd
                        /pgm | 10        15 | EN
                       /psen | 11        14 | /rw
                         gnd | 12        13 | A8
                             |______________|
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