tcj_03 1983-11 01.03.pdf

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THE

COMPUTER JOURNAL@

For Those Who Interface, BUild, and Apply Micros

Issue Number 3

Vol. 1, No.3

$2.50

Add an

8087

Math Chip

to Your Dual Processor Board p

age2

Build an A/D Converter for the Apple ][page7

ASCII Reference Chart p

ageS12and13

Modems for Microspage14

The CP/M Operating System page17

Part Two:

Build a Hardware Print Spooler p

age19

The Computer Journal 1

Editor's Page

We've ChUlled Our Name

The bad press for the word Hacker which we

mentioned in October has been even worse this

month. We origillally felt that the word Hacker. as it

was used until the early part of 1983, best described

what we wanted to do; but the new usage definitely is

not what this magazine is all about.

We received negative feedback about our name

from the very beginning, but we resisted change

because we couldn't think of a more suitable title.

Because of the continued bad press we decided not to

fight the name any longer, and have changed to

The

Computer Journal

effective with the November issue.

Those of you who have been with us from the

beginning have real collectors items in the September

and October issues. because there won't be any more

issues with that name.

We have not changed our goal of providing hands-

on construction articles, tutorials, and information for

those interested in advancing their use of the

microcomputer. We have just changed the name in

order to avoid rejection by those who use the

currently popular definition of Hacker.

We appreciate your support, and encourage you to

send your ideas. suggestions, criticism. and articles.

We need your feedback on what information you

would like to see published.

ba.iDes. at their

OWD

lamer The trend is from eight

bit to sixteen bit machines, with work being done on

thirty-two bit machines. Unfortunately, entering the

market with wider bus machines takes a lot of money

and a long lead time before the cash starts rolling in.

When you start short on cash, you have to be

innovative and break new ground.

I feel that the next NEW growth area for micros

will be in applying them to control applications. We

have micros in ovens, cars, telephones and,cameras

but we have only scratched the surface. There are

thousands of uses waiting to be developed by an

entrepreneur who can see these applications.

The days of starting a computer company by

assembling micros, (as we know them today,) at night

in the garage are gone. So are the days of starting a

software company using baggies. Now you need fancy

(and expensive) four color packaging and full page ads

to even try to break into these fields.

The only way that someone with limited capital

can break into the field today is to be first with an

innovative idea. and establish their market before

others can react with a similar product. And react

they

will.

because success is always copied

•

What Is The Next Mleroeomputer Frontier?

Many of the current microcomputer developments

were initially developed by entrepreneurs working in

their garage or buement, bpt the business climate

has changed drastieally since then. Big business has

discovered microcomputers, and it is swamping the

field with many copy-cat products, mass marketing

sales techniques, and Madison Avenue hype

advertising. They don't have innovative products, but

they do have the megabucks to overwhelm the small

business entrepreneur.

What are tomarrow's new markets? Forecasting

the future is always difficult, especially when you are

talking about the opportunities for an individual or

small business with limited capital. ¥oa cu't beat bla

Editor/Publuher

A rt Director

Technical Editor

Production A"utant.

Art Carllon

Joan Thomp,01l

Lance

ROle

Phil Welll

Judie Overbeek

The Computer

Jow.~

publuhed 12

time, a year. Ann¥al nb,cnption

IU in the

U.S.,

130

Cafl4d4, and

139

in other countTie,.

E"tire conte,," copyright

1983

by The

Computer JovnsaL

Po,tmalter. Seftd addre" cla4"ge, to: The

Computer JouT'llal, P.O. Box

1697,

Kalupell, MT

59903·1697.

Addre"

all

editori4l, advertui"g and

nb,cnption mqvire, to: The Computer JovT'llal,

P.O. Box

1697,

KalUpell. MT

59903·1697.

2 The Computer Joumal

ADD AN 8087 TO YOUR DUAL PROCESSOR BOARD

Lance Rose, Technical Editor

hen Godbout Electronics (now Compupro)

first

brought

out the

8085/8088

dual processor board several years ago, it

was advertised as being "a bridge between two worlds." I

liked the concept of the dual processor and was one of the

early purchasers and users of it. (Remember when you could

still get "unkitll"?) The idea must have been a good one

since several other manufacturers are now offering dual

processor boards, some of which are

8085/8088

like the

Godbout, and others which are

Z80/8088.

rve been very pleased with the

O~xibility

and

performance of the board and have been successful at

increasing the clock speed to

MHz for the

8085

and

MHz

for the

8088,

even though the board was only specified

run at 5 MHz. Apparently the Intel processors used are

rated very conservatively.

One thing I have missed on the board is the option to add

Intel's

8087

numeric data processor, a coprocessor which,

when used with the

8086

8088,

performs Ooating point

computations in hardware instead of software, and which

can increase program execution speeds by 2 or 3 orders of

magnitude

the programs are heavily computation-

oriented.

Since I deal with just that sort of program in my work,

last year I began looking for a way to add this powerful

coprocessor to my board. It's no criticism of Godbout that

there isn't an empty soeket on the board for the

8087.

you

look, the dual processor board is packed with chips and of

necessity has to be in order to give you two processors,

their support circuitry. and circuitry to make the switchover

between the two. In addition to the circuitry, there are the

power-on jump. extended addressing, and the circuitry to

merge DMA bus requests with those of both processors

when the switchover occurs. There just isn't enough space

left for another 4o-pin socket on the board.

The answer to this is to add a small "piggyback" circuit

board, an idea that is used quite often in electronics to add

features that aren't preaent in the original product. This

board simply plugs into the main circuit board in place of

the existing

8088

processor and contains sockets for the

8088. the

8087

numeric processor. the

8288

bus controller

(more about this later). and a few additional support chips.

While it's possible to get all the power for the piggyback

board from the main board, an additional

~volt

regulator is

included to ease the burden on the main board regulators.

The

8087

draws 600 ma from the power supply and when

you add the 8288 and other support ehips, a separate

regulator is a

good

idea. The 8088 continues to draw its

power from the main board.

Theory of Operation

A schematic for the circuit of the add-on board is shown

in Figure

An assoeiated parts list is shown in Figure 2.

Before explaining the circuit in detail we need to have an

understanding of the two different modes the

8088

can run

in.

When Intel designed the

8088,

they saw (with some

foresight, I think) that this microprocessor could be used

a variety of applications from simple to complex. They

therefore assigned one pin on the chip to be tied either high

or low depending on whether the system was a simple one

containing a single processor, or a complicated one with

multiple processors, bus arbitration, and so forth. This pin is

labeled MN/MX- (where an asterisk denotes an active low

signa}). In the minimum mode the

8088

takes the

responsibility for generating the neeessary bus signals to

select memory or 110, read and write, and a HOLD/HLDA

type of DMA protocol. This is the mode used in the Godbout

board and in all likelihood in other dual processor boards.

has the advantage of not requiring any additional bus

controllers, and the HOLD/HLDA protocol lends itself to

easy interfacing with the 8-100 bus. The disadvantage is

that there is no way of adding the

8087

numerie processor or

8089

1/0 processor to the circuit. Both of them need

additional coordination so they can share the bus with the

main processor.

In maximum mode, a number of the pins on the

8088

take

on a different use. Instead of generating bus signals directly.

8288

bus controller is added to do this. This frees some of

the pins on the CPU to be used to coordinate

tasks

with

coprocessors, here the

8087.

There are lines (QSO, QS1) to

allow the

8087

to track the status of the instruction queue

on the

8088

as well as monitor what is going on on the bus.

In this way when an instruction comes along that is meant

for the

8087

and not the 8088 (an ESC instruction), the

8087

will

respond

it. There is a line to tell the

8088

when the

8087

is busy (TEST-) so that the CPU

will

not attempt to

use results of a Ooating point operation before it has been

deposited in memory by the 8087.

A different DMA protocol is used in maximum mode

where a 3-pulse sequence on a bidirectional line represents

(ll

the initial request for a grant of the bus, (2) the granting

of the bus by the CPU, and (3) the release of the bus by the

requesting device. This is explained in detail in the "IAPX

86,88 User's Manual."

This and the application Dote

"Getting Started with the Numerie Data Processor" (AP-

113), are available from Intel Corporation. Another

good

book on the subject is "The 8086 Book" by Ruaaell Rector

,"'

,,.

The Computer Journal

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4 1he Computer Journal

and George Alexy. All of these publications contain a wealth

of material on the 8086 family of microprocessors.

The purpose of the additional logic on the piggyback

board is to make an 8088 running in maximum mode on the

small board appear to the main board as

it were running

in minimum mode. Luckily all the address and data lines are

the same in both modes as well as some of the control lines

so we can route these directly from the DIP header to both

40-pin sockets with no change. The most difficult part of the

matching operation involves the conversion of the

HOLDfHLDA sequence for minimum mode to the RQ·/GT·

pulse sequence. There is a circuit in one of the books

mentioned above that performs this function, and I

originally used it. However the processor swap wasn't 100%

successful with it, and once in a while the machine would die

trying to change over from the 8085 to the 8088 or back.

After designing the present circuit. I decided that the

reason it hadn't worked completely was that the HLDA was

being dropped too quickly after HOLD was removed.

Whether this is peculiar to the conversion circuit or to the

Godbout board I can't say.

R1-R3

R4,R5

8088central processor

8087 numeric processor

8288 bus controller

74LS266 quad exculsive-NOR, open collector

74LS76 dual JK flip-flop

74LS74 dual Dflip-flop

74LS75 Hit Dlatch

74LS367 hex tri-state buffer

'I.

watt

10K V. watt

40-pin DIP header

Figure 2: Parts List for

8088/8087

Piggyback Board

In any case, the circuit here accomplishes the conversion

from HOLDfHLDA to RQ·/GT· with the flip-flops U5 and

U6 along with exlusive-OR gate U4a. When the board is

reset, the 8088 is not on hold. Since the 8085 is supposed to

get control on a power-on or reset, the HOLD line to the

8088 immediately goes high. On the falling edge of each of

the next two 8088 clock pulses,

uSa

toggles since its inputs

are high. This generates a RQ* pulse to the 8088. The 8088

RQ*/GT* line is driven by open collector gate U4b. Since the

request/grant line

bidireetional, it cannot be driven by a

totem-pole output and requires an open colleetor or tri-state

driver. At the end of this pulse, U5b, which is clocked by the

output of U5a, toggles its state causing the inputs of U5a to

change from high to low since HOLD is still high and the

second input to U4a has changed from high to low. This puts

flip-flop

uSa

in the hold mode. At the same time this occurs,

the preset inputs on U6, which kept HLDA low, are released

allowing U6a to respond to a GT* level from the 8088. This

level

sampled on the rising edge of the clock and may

occur on the next rising edge following the falling edge

which terminated the

RQ·

pulse.

When GT· is detected, U6a clocks the low GT* into

its

output. The complement output in turn clocks U6b. This

causes HLDA to go high and it remains high even if U6a is

clocked back low. The 8088 is now held and the 8085 has

control of the dual processor board bus hind of course the S-

100 bus). This state of affairs remains until the processor

swap occurs. At this time, HOLD goes back to low. When

this happens, the inputs to U5a again become high and the

next two clocks cause toggling to occur. sending the release

pulse to the 8088. This lets the 8088 know that it can begin

operating. Since the output of U5a toggles U5b back to low,

U6 is asynchronously preset and HLDA drops to low. This

signals the processor swap circuitry on the main board that

the 8088 is now in control of the bus.

Other than converting between DMA conventions, the

rest of the modifications are fairly minor. The RD· signal is

generated by combining the memory and I/O read lines from

the 8288. Similarly, the WR· signal is derived from AMWC·

and AIOWC* of the bus controller.

turns out that the

"advance" outputs for these signals more closely

approximate the timing of WR· in the minimum mode than

the normal outputs.

The ALE and DT/R* signals are now generated by the

8288 instead of the 8088 but are otherwise unchanged. The

SO* and S2* signals emulate SSO* and IOIM* except that

their duration is shorter and S2* needs to be inverted. U7a

latches these two signals when ALE

active and holds

them. approximating the minimum mode timing. All the

control signals except ALE are now routed through tri-state

U8 to disconneet them from the system bus when the 8085 is

in control. This is necessary since some of these which were

formerly tri-stated by the 8088 in minimum mode are now

generated by the 8288 and are no longer tri-stated. One part

of U7b

used as an inverter with its enable input tied high.

This changes the positive-going reset signal available at the

DIP header into the necessary negative-going reset for the

flip-flops U5 and U6.

Resistors Rl, R2 and R3 are used as pull-ups for the open-

collector exclusive NOR gate U4. R4 and R5 serve as pull-

down resistors for two inputs of the 8088 which are

normally driven by the 8087. This allows the piggyback

board to funetion without the 8087 plugged in. for checkout

you want to remove the numeric processor for some

reason.

you need the NMI line on the 8088 for your system's

operation, you can omit the conneetion between that line

and the 8087. The 8087 can operate without interrupts if

desired. On a power-up or reset, the 8087 interrupt request

line is masked so the 8088

will

not necessarily be

interrupted, even though the 8087 is tied to the NMI line.

You have to enable interrupts in the 8087 to cause an

interrupt to occur. Alternatively, a few additional gates

can OR together the system bus INTR line with that from

the 8087, leaving the NMI for system use. A lot depends

here on how much you need the NMI for other activities.

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