IRFP150.pdf

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Data
IR
Sheet
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IRFP150
January 2002
40A, 100V, 0.055 Ohm, N-Channel Power
MOSFET
This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17431.
Features
• 40A, 100V
• r
DS(ON)
= 0.055
Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Ordering Information
PART NUMBER
IRFP150
PACKAGE
TO-247
BRAND
IRFP150
Symbol
D
NOTE: When ordering, include the entire part number.
G
S
Packaging
JEDEC STYLE TO-247
TOP VIEW
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
©2002 Fairchild Semiconductor Corporation
IRFP150 Rev. B
IRFP150
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
IRFP150
100
100
40
26
160
±
20
180
1.44
150
-55 to 150
300
260
UNITS
V
V
A
A
A
V
W
W/
o
C
mJ
o
C
o
C
o
C
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DS
Drain to Gate Voltage (R
GS
= 20k
Ω)
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
GS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P
D
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 125
o
C.
Electrical Specifications
PARAMETER
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
BV
DSS
V
GS(TH)
I
DSS
I
D(ON)
I
GSS
r
DS(ON)
g
fs
t
D(ON)
t
r
t
D(OFF)
t
f
Q
g(TOT)
Q
gs
Q
gd
C
ISS
C
OSS
C
RSS
L
D
Measured from the Drain
Lead, 6mm (0.25in) from
the Package to the
Center of the Die
Measured from the
Source Lead, 6mm
(0.25in) from the Header
to the Source Bonding
Pad
Modified MOSFET
Symbol Showing the
Internal Devices
Inductances
D
L
D
G
L
S
S
TEST CONDITIONS
V
GS
= 0V, I
D
= 250
µ
A (Figure 10)
V
GS
= V
DS
, I
D
= 250
µ
A
V
DS
= Rated BV
DSS
, V
GS
= 0V
V
DS
= 0.8 x Rated BV
DSS
, V
GS
= 0V, T
J
= 125
o
C
V
DS
> I
D(ON) x
r
DS(ON)MAX
, V
GS
= 10V
V
GS
=
±
20V
V
GS
= 10V, I
D
= 22A (Figures 8, 9)
V
DS
≥
20V, I
D
= 20A (Figure 12)
V
DD
= 50V, I
D
= 40A, R
GS
= 6.8
Ω
, R
L
= 1.2
Ω
MOSFET Switching Times are Essentially
Independent of Operating Temperature
MIN
100
2.0
-
-
40
-
-
13
-
-
-
-
TYP
-
-
-
-
-
-
0.045
20
15
140
60
90
70
20
30
2000
1000
350
5.0
MAX
-
4.0
25
250
-
±
100
0.055
-
24
210
89
140
110
-
-
-
-
-
-
UNITS
V
V
µ
A
µ
A
A
nA
Ω
S
ns
ns
ns
ns
nC
nC
nC
pF
pF
pF
nH
Drain to Source Breakdown Voltage
Gate to Threshold Voltage
Zero-Gate Voltage Drain Current
On-State Drain Current (Note 2)
Gate to Source Leakage
Drain to Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
(Gate to Source + Gate to Drain)
Gate to Source Charge
Gate to Drain “Miller” Charge
Input Capacitance
Output Capacitance
Reverse-Transfer Capacitance
Internal Drain Inductance
V
GS
= 10V, I
D
= 40A, V
DS
= 0.8 x Rated BV
DSS
.
I
g(REF)
= 1.5mA (Figure 14)
Gate Charge is Essentially Independent of
Operating Temperature
V
GS
= 0V, V
DS
= 25V, f = 1.0MHz (Figure 11)
-
-
-
-
-
-
-
Internal Source Inductance
L
S
-
12.5
-
nH
Junction to Case
Junction to Ambient
R
θ
JC
R
θ
JA
Free Air Operation
-
-
-
-
0.70
30
o
C/W
o
C/W
©2002 Fairchild Semiconductor Corporation
IRFP150 Rev. B
IRFP150
Source to Drain Diode Specifications
PARAMETER
Continuous Source to Drain Current
Pulse Source to Drain Current (Note 3)
SYMBOL
I
SD
I
SDM
TEST CONDITIONS
Modified MOSFET
Symbol Showing the
Integral Reverse P-N
Junction Diode
G
D
MIN
-
-
TYP
-
-
MAX
40
170
UNITS
A
A
S
Source to Drain Diode Voltage (Note 2)
Reverse Recovery Time
Reverse Recovered Charge
V
SD
t
rr
Q
RR
T
J
= 25
o
C, I
SD
= 40A, V
GS
= 0V (Figure 13)
T
J
= 25
o
C, I
SD
= 40A, dI
SD
/dt = 100A/
µ
s
T
J
= 25
o
C, I
SD
= 40A, dI
SD
/dt = 100A/
µ
s
-
98
0.41
-
-
-
2.5
530
2.5
V
ns
µ
C
NOTES:
2. Pulse Test: Pulse width
≤
300
µ
s, duty cycle
≤
2%.
3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. V
DD
= 10V, starting T
J
= 25
o
C, L = 170
µH,
R
G
= 50Ω, Peak I
AS
= 40A.
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
Unless Otherwise Specified
50
0.8
0.6
0.4
0.2
0
I
D,
DRAIN CURRENT (A)
40
30
20
10
0
0
50
100
150
25
50
75
100
125
150
T
C
, CASE TEMPERATURE (
o
C)
T
C
, CASE TEMPERATURE (
o
C)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
Z
θJC
, TRANSIENT THERMAL IMPEDANCE
1
0.5
0.2
0.1
0.05
0.02
10
-2
0.01
t
1
t
2
t
2
SINGLE PULSE
10
-3
10
-5
10
-4
10
-3
10
-2
0.1
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θJC
x R
θJC
+ T
C
1
10
P
DM
0.1
t
1
, RECTANGULAR PULSE DURATION (S)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
©2002 Fairchild Semiconductor Corporation
IRFP150 Rev. B
IRFP150
Typical Performance Curves
10
3
OPERATION IN THIS
REGION IS LIMITED
BY r
DS(ON)
10
2
10µs
100µs
I
D
, DRAIN CURRENT (A)
Unless Otherwise Specified
(Continued)
60
V
GS
= 10V
V
GS
= 8V
V
GS
= 7.0V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
GS
= 6.0V
I
D
, DRAIN CURRENT (A)
48
36
1ms
10
T
C
= 25
o
C
T
J
= MAX RATED
SINGLE PULSE
1
1
10
10ms
24
V
GS
= 5.0V
12
V
GS
= 4.0V
DC
10
2
10
3
0
0
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
10
20
30
40
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
50
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
V
GS
= 10V
I
D
, DRAIN CURRENT (A)
48
V
GS
= 8V
V
GS
= 7V
I
DS(ON)
, DRAIN TO SOURCE CURRENT (A)
60
100
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
DS
= 20V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
36
V
GS
= 6V
24
V
GS
= 5V
12
V
GS
= 4V
0
0
1
2
3
4
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
5
10
T
J
= 150
o
C
1
T
J
= 25
o
C
0.1
0
2
4
6
8
V
SD
, GATE TO SOURCE VOLTAGE (V)
10
FIGURE 6. SATURATION CHARACTERISTICS
FIGURE 7. TRANSFER CHARACTERISTICS
0.40
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
r
DS(ON)
, DRAIN TO SOURCE
ON RESISTANCE
0.32
2.5
2.0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
I
D
= 22A, V
GS
= 10V
0.24
1.5
0.16
V
GS
= 10V
0.08
V
GS
= 20V
0
30
60
90
I
D
, DRAIN CURRENT (A)
120
150
1.0
0.5
0
0
-60
-40
-20
0
20
40
60
80
100 120 140 160
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
©2002 Fairchild Semiconductor Corporation
IRFP150 Rev. B
IRFP150
Typical Performance Curves
1.25
I
D
= 250µA
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
1.15
C, CAPACITANCE (
P
F)
4000
Unless Otherwise Specified
(Continued)
5000
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
≈
C
DS
+ C
GD
1.05
3000
C
ISS
C
OSS
0.95
2000
0.85
1000
C
RSS
0.75
-60
-40
-20
0
20
40
60
80
100 120 140 160
0
1
2
5
10
2
5
10
2
T
J
, JUNCTION TEMPERATURE (
o
C)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
30
g
fs
, TRANSCONDUCTANCE (S)
24
T
J
= 25
o
C
18
T
J
= 150
o
C
I
SD
, SOURCE TO DRAIN CURRENT (A)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
DS
=
≥
20V
10
3
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
10
2
T
J
= 150
o
C
10
12
T
J
= 25
o
C
6
0
0
12
24
36
I
D
, DRAIN CURRENT (A)
48
60
1
0
0.6
1.2
1.8
2.4
V
SD
, SOURCE TO DRAIN VOLTAGE (V)
3.0
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
D
= 40A
16
V
DS
= 20V
12
V
DS
= 50V
V
DS
= 80V
8
4
0
0
30
60
90
120
150
Q
g
, GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
©2002 Fairchild Semiconductor Corporation
IRFP150 Rev. B

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