1012.PDF

(123 KB) Pobierz
19-0282; Rev 0; 7/94
KIT
ATION
EVALU
BLE
AVAILA
250Msps, 8-Bit ADC with Track/Hold
____________________________Features
o
o
o
o
o
o
o
o
o
o
o
o
250Msps Conversion Rate
6.8 Effective Bits at 125MHz
Less than ±1/2LSB INL
50Ω Differential or Single-Ended Inputs
±270mV Input Signal Range
Reference Sense Inputs
Ratiometric Reference Inputs
Configurable Dual-Output Data Paths
Latched, ECL-Compatible Outputs
Low Error Rate, Less than 10
-15
Metastable States
Selectable On-Chip 8:16 Demultiplexer
84-Pin Ceramic Flat Pack
_______________General Description
The MAX100 ECL-compatible, 250Msps, 8-bit analog-to-
digital converter (ADC) allows accurate digitizing of ana-
log signals from DC to 125MHz (Nyquist frequency).
Designed with Maxim’s proprietary advanced bipolar
processes, the MAX100 contains a high-performance
track/hold (T/H) amplifier and a quantizer in a single
ceramic strip-line package.
The innovative design of the internal T/H assures an
exceptionally wide input bandwidth of 1.2GHz and aper-
ture delay uncertainty of less than 2ps, resulting in a high
6.8 effective bits performance. Special comparator output
design and decoding circuitry reduce out-of-sequence
code errors. The probability of erroneous codes occurring
due to metastable states is reduced to less than 1 error
per 10
15
clock cycles. Unlike other ADCs, which can
have errors that result in false full-scale or zero-scale out-
puts, the MAX100 keeps the magnitude to less than 1LSB.
The analog input is designed for either differential or single-
ended use with a ±270mV range. Sense pins for the refer-
ence input allow full-scale calibration of the input range or
facilitate ratiometric use. Midpoint tap for the reference
string is available for applications that need to modify the
output coding for a user-defined bilinear response. Use of
separate high-current and low-current ground pins pro-
vides better noise immunity and highest device accuracy.
Dual output data paths provide several data output modes
for easy interfacing. These modes can be configured as
either one or two identical latched ECL outputs. An 8:16
demultiplexer mode that reduces the output data rates to
one-half the clock rate is also available.
For applications that require faster data rates, refer to
Maxim’s MAX101, which allows conversion rates up to
500Msps.
MAX100
________________________Applications
High-Speed Digital Instrumentation
High-Speed Signal Processing
Medical Systems
Radar/Sonar
High-Energy Physics
Communications
______________Ordering Information
PART
TEMP. RANGE
PIN-PACKAGE
84 Ceramic Flat Pack (with heatsink)
MAX100CFR* 0°C to +70°C
*Contact factory for 84-Pin Ceramic Flat Pack without heatsink.
_________________________________________________________Functional Diagram
VA
RT
VA
RTS
VA
CT
VA
CTS
VA
RBS
VA
RB
L
A
T
C
H
E
S
B
U
F
F
E
R
L
A
T
C
H
E
S
8
AIN+
AIN-
CLK
CLK
TRACK/
HOLD
MODE
CONTROL
FLASH CONVERTER
8
AData
(A0–A7)
DCLK
DCLK
8
MOD
DIV
A=B
BData
(B0–B7)
________________________________________________________________
Maxim Integrated Products
1
Call toll free 1-800-998-8800 for free literature.
250Msps, 8-Bit ADC with Track/Hold
MAX100
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltages
V
CC
.............................................................................0V to +7V
V
EE
...............................................................................-7V to 0V
V
CC -
V
EE
............................................................................+12V
Analog Input Voltage .............................................................±2V
Digital Input Voltage .................................................-2.3V to +0V
Reference Voltage (VA
RT
) .....................................-0.3V to +1.5V
Reference Voltage (VA
RB
).....................................-1.5V to +0.3V
Data Output Current ..........................................................-33mA
DCLK Output Current ........................................................-43mA
Operating Temperature Range...............................0°C to +70°C
Operating Junction Temperature (Note 2)............0°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+250°C
Note 1:
The digital control inputs are diode protected; however, permanent damage may occur on unconnected units under high-
energy electrostatic fields. Keep unused units in conductive foam or shunt the terminals together. Discharge the conduc-
tive foam to the destination socket before insertion.
Note 2:
Typical thermal resistance, junction-to-case R
θJC
= 5°C/W and thermal resistance, junction to ambient (MAX100CA) R
θJA
=
12°C/W, providing 200 lineal ft/min airflow with heatsink. See
Package Information.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
EE
= -5.2V, V
CC
= +5V, R
L
= 50Ω to -2V, VA
RT
= 1.02V, VA
RB
= -1.02V, T
MIN
to T
MAX
= 0°C to +70°C, T
A
= +25°C, unless
otherwise noted.) (Note 3)
PARAMETER
ACCURACY
Resolution
Integral Nonlinearity (Note 4)
Differential Nonlinearity
DYNAMIC SPECIFICATIONS
Effective Bits
ENOB
f
CLK
= 250MHz,
V
IN
= 95% full scale
(Note 5)
f
AIN
= 10MHz
f
AIN
= 50MHz
f
AIN
= 125MHz
7.4
7.1
6.8
44.5
250
1.2
270
2
230
-305
-17
1.8
49
0.008
315
-215
+32
2.5
51
dB
Msps
GHz
ps
ps
Bits
INL
DNL
AData, BData
AData, BData,
no missing codes
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
8
±0.5
±0.6
±0.75
±0.85
Bits
LSB
LSB
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Signal-to-Noise Ratio
Maximum Conversion Rate
Analog Input Bandwidth
Aperture Width
Aperture Jitter
ANALOG INPUT
Input Voltage Range
Input Offset Voltage
Least-Significant-Bit Size
Input Resistance
Input Resistance
Temperature Coefficient
SNR
f
CLK
BW
3dB
t
AW
t
AJ
f
AIN
= 50MHz, f
CLK
= 250MHz, V
IN
= 95%
full scale (Note 6)
(Note 7)
Figure 5
Figure 5
Full scale
Zero scale
AIN+, AIN-, T
A
= T
MIN
to T
MAX
T
A
= T
MIN
to T
MAX
AIN+ and AIN- with respect to GND
AIN+ to AIN-, Table 2,
T
A
= T
MIN
to T
MAX
V
IN
V
IO
LSB
R
I
mV
mV
mV
Ω
Ω/°C
2
_______________________________________________________________________________________
250Msps, 8-Bit ADC with Track/Hold
ELECTRICAL CHARACTERISTICS (continued)
(V
EE
= -5.2V, V
CC
= +5V, R
L
= 50Ω to -2V, VA
RT
= 1.02V, VA
RB
= -1.02V, T
MIN
to T
MAX
= 0°C to +70°C, T
A
= +25°C, unless
otherwise noted.) (Note 3)
PARAMETER
REFERENCE INPUT
Reference String Resistance
Reference String Resistance
Temperature Coefficient
LOGIC INPUTS
Digital Input Low Voltage
(Note 8)
Digital Input High Voltage
(Note 8)
V
IL
V
IH
DIV, MOD, A=B, CLK, CLK,
T
A
= T
MIN
to T
MAX
DIV, MOD, A=B, CLK, CLK,
T
A
= T
MIN
to T
MAX
DIV, MOD, A=B = -1.8V, T
A
= T
MIN
to T
MAX
Digital Input Low Current
I
IL
CLK, CLK, V
IL
= -1.8V (no termination),
T
A
= T
MIN
to T
MAX
DIV, MOD, A=B = -0.8V, T
A
= T
MIN
to T
MAX
Digital Input High Current
I
IH
CLK, CLK, V
IH
= -0.8V (no termination),
T
A
= T
MIN
to T
MAX
AData, BData,
DCLK, DCLK
AData, BData,
DCLK, DCLK
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= T
MIN
to T
MAX
V
CC
(nom) = ±0.25V
V
EE
(nom) = ±0.25V
-750
-780
35
40
40
-560
-1.07
-5
0
-5
0
20
µA
80
20
µA
80
-1.5
V
V
SYMBOL
R
REF
VA
RT
to VA
RB
CONDITIONS
MIN
116
0.02
TYP
MAX
175
UNITS
Ω
Ω/°C
MAX100
LOGIC OUTPUTS (Note 9)
Digital Output Low Voltage
Digital Output High Voltage
POWER REQUIREMENTS
Positive Supply Current
Negative Supply Current
Common-Mode Rejection Ratio
Power-Supply Rejection Ratio
I
CC
I
EE
CMRR
PSRR
V
CC
= 5.0V
V
EE
= -5.2V
V
INCM
= ±0.5V
T
A
= T
MIN
to T
MAX
464
670
710
mA
mA
dB
dB
V
OL
V
OH
-1.95
-1.95
-1.02
-1.10
-1.60
-1.50
-0.70
-0.70
V
V
_______________________________________________________________________________________
3
250Msps, 8-Bit ADC with Track/Hold
MAX100
TIMING CHARACTERISTICS
(V
EE
= -5.2V, V
CC
= +5V, R
L
= 50Ω to -2V, VA
RT
= 1.02V, VA
RB
= -1.02V, T
A
= +25°C, unless otherwise noted.)
PARAMETER
Clock Pulse Width Low
Clock Pulse Width High
CLK to DCLK
Propagation Delay
DCLK to A/BData
Propagation Delay
Rise Time
Fall Time
SYMBOL
t
PWL
t
PWH
t
PD1
t
PD2
t
R
t
F
CONDITIONS
CLK, CLK, Figures 1 and 2
CLK, CLK, Figures 1 and 2
DIV = 0, Figure 1
DIV = 1, Figure 2
DIV = 0, Figure 1
DIV = 1, Figure 2
DCLK
20% to 80%
DATA
DCLK
20% to 80%
DATA
See Figures 3 and 4
and Table 1 (delay
depends on output
mode)
Divide-by-1 mode
Divide-by- AData
2 mode
BData
MIN
1.9
1.9
0.8
1.9
0.5
-1.4
500
700
600
550
7 1/2
7 1/2
8 1/2
7 1/2
7 1/2
8 1/2
TYP
MAX
5.0
2.4
5.7
2.2
-0.1
UNITS
ns
ns
ns
ns
ps
ps
Pipeline Delay
(Latency)
t
NPD
Clock
Cycles
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
All devices are 100% production tested at +25°C and are guaranteed by design for T
A
= T
MIN
to T
MAX
as specified.
Deviation from best-fit straight line. See
Integral Nonlinearity
section.
See the
Signal-to-Noise Ratio and Effective Bits
section in the
Definitions of Specifications.
SNR calculated from effective bits performance using the following equation: SNR (dB) = 1.76 + (6.02) (effective bits).
Clock pulse width minimum requirements t
PWL
and t
PWH
must be observed to achieve stated performance.
Functionality guaranteed for -1.07
≤
V
IH
≤
-0.7 and -2.0
≤
V
IL
≤
-1.5.
Outputs terminated through 50Ω to -2.0V.
__________________________________________Typical Operating Characteristics
(T
A
= +25°C, unless otherwise noted.)
INTEGRAL NONLINEARITY
vs. OUTPUT CODE
0.75
0.50
DNL (LSBs)
0.25
INL (LSBs)
0
-0.25
-0.50
-0.75
0
64
128
OUTPUT CODE
192
256
0.75
0.50
0.25
0
-0.25
-0.50
-0.75
0
DIFFERENTIAL NONLINEARITY
vs. OUTPUT CODE
64
128
OUTPUT CODE
192
256
4
_______________________________________________________________________________________
250Msps, 8-Bit ADC with Track/Hold
____________________________Typical Operating Characteristics (continued)
(T
A
= +25°C, unless otherwise noted.)
FFT PLOT (f
AIN
= 120.4462MHz)
0
-10
SIGNAL AMPLITUDE (dB)
SIGNAL AMPLITUDE (dB)
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
12.5
25
37.5
50
62.5
FREQUENCY (MHz)
f
CLK
= 250MHz, f
AIN
= 10.4462MHz
SER = -45.87dB, NOISE FLOOR = -68.5dB
MAX100
FFT PLOT (f
AIN
= 10.4462MHz)
-20
-30
-40
-50
-60
-70
-80
-90
-100
0 12.5 25 37.5 50 62.5 75 87.5 100 112.5 125
FREQUENCY (MHz)
f
CLK
= 250MHz, f
AIN
= 120.4462MHz
SER = -42.3dB, NOISE FLOOR = -65.4dB
EFFECTIVE BITS
vs. ANALOG INPUT FREQUENCY
MAX100-10
EFFECTIVE BITS
vs. CLOCK FREQUENCY
7
6
EFFECTIVE BITS
5
4
3
2
1
0
f
AIN
= 10.4MHz,
V
IN
= 95% FS
MAX100-11
8
7
6
EFFECTIVE BITS
5
4
3
2
1
0
0
50
100
150
200
250
f
CLK
= 250MHz,
V
IN
= 95% FS
8
300
0
50
100
150
f
CLK
(MHz)
200
250 300
f
AIN
(MHz)
EFFECTIVE BITS
vs. ANALOG INPUT FREQUENCY
MAX100-12
EFFECTIVE BITS
vs. ANALOG INPUT FREQUENCY
7
6
EFFECTIVE BITS
5
4
3
2
1
0
T
CASE
= -15°C,
f
CLK
= 250MHz
V
IN
= 95% FS
0
50
100
150
200
250
MAX100-13
8
7
6
EFFECTIVE BITS
5
4
3
2
1
0
0
50
100
150
200
T
CASE
= +80°C,
f
CLK
= 250MHz,
V
IN
= 95% FS
8
250
f
AIN
(MHz)
f
AIN
(MHz)
_______________________________________________________________________________________
5

Plik z chomika:

Inne pliki z tego folderu:

Inne foldery tego chomika:

Zgłoś jeśli naruszono regulamin