RFM73_Datasheet.pdf

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RFM73
Low Power High Performance 2.4 GHz GFSK Transceiver
Features
2400-2483.5 MHz ISM band operation
Support 250Kbps, 1Mbps and 2 Mbps air
data rate
Programmable output power
Low power consumption
Tolerate +/- 60ppm 16 MHz crystal
Variable payload length from 1 to32bytes
Automatic packet processing
6 data pipes for 1:6 star networks
1.9V to 3.6V power supply
4-pin SPI interface with maximum 8MHz
clock rate
Compact 20-pin 3x3 or 4x4mm QFN
package
RFP
VDD
VSS IREF
11
VDDPA
6
IRQ
7
VDD
8
VSS
9
XTALP
10
XTALN
Applications
Wireless PC peripherals
Wireless mice and
keyboards
Wireless gamepads
Wireless audio
VOIP and wireless headsets
Remote controls
Consumer electronics
Home automation
Toys
Personal health and entertainment
Block Diagram
SPI
Interface
RFP
RFN
FM
Demodulator
Rx FIFO
Data Slicer
CSN
SCK
MOSI
MISO
IRQ
CE
Register
banks
Integrated
TDD RF
Transceiver
Power
Management
Packet
Processing &
State Control
FM Modulator
Gaussian
shaping
Tx FIFO
Page 1 of 26
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RFM73
Table of Contents
1
2
3
4
General Description
................................................................................................................. 3
Abbreviations
.......................................................................................................................... 4
Pin Information
....................................................................................................................... 5
State Control
........................................................................................................................... 6
4.1 State Control Diagram ............................................................................................................... 6
4.2 Power Down Mode.................................................................................................................... 7
4.3 Standby-I Mode ......................................................................................................................... 7
4.4 Standby-II Mode........................................................................................................................ 7
4.5 TX Mode ................................................................................................................................... 7
4.6 RX Mode ................................................................................................................................... 8
5
Packet Processing
.................................................................................................................... 8
5.1 Packet Format ............................................................................................................................ 8
5.1.1 Preamble........................................................................................................................... 9
5.1.2 Address............................................................................................................................. 9
5.1.3 Packet Control .................................................................................................................. 9
5.1.4 Payload ........................................................................................................................... 10
5.1.5 CRC ................................................................................................................................ 10
5.2 Packet Handling ...................................................................................................................... 10
6
Data and Control Interface
.................................................................................................... 11
6.1 TX/RX FIFO ........................................................................................................................... 11
6.2 Interrupt ................................................................................................................................... 11
6.3 SPI Interface ............................................................................................................................ 12
6.3.1 SPI Command ................................................................................................................ 12
6.3.2 SPI Timing ..................................................................................................................... 13
7
Register Map
......................................................................................................................... 15
7.1 Register Bank 0 ....................................................................................................................... 15
7.2 Register Bank 1 ....................................................................................................................... 21
8
Electrical Specifications
......................................................................................................... 22
9
Typical Application Schematic...............................................................................................
23
10 Package Information..............................................................................................................
24
11 Order Information
................................................................................................................. 26
12
Solder Information……………………………………………………………………………………..26
13
Contact Information
............................................................................................................... 27
Page 2 of 27
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RFM73
1
General Description
resolution of the RF channel frequency is
1MHz.
A transmitter and a receiver must be
programmed with the same RF channel
frequency to be able to communicate with
each other.
The output power of RFM73 is set by the
RF_PWR bits in the RF_SETUP register.
Demodulation is done with embedded data
slicer and bit recovery logic. The air data rate
can be programmed to 250Kbps, 1Mbps or
2Mbps by RF_DR_HIGH and RF_DR_LOW
register. A transmitter and a receiver must be
programmed with the same setting.
In the following chapters, all registers are in
register bank 0 except with explicit claim.
RFM73 is a GFSK transceiver operating in
the world wide ISM frequency band at 2400-
2483.5 MHz. Burst mode transmission and up
to 2Mbps air data rate make them suitable for
applications requiring ultra low power
consumption.
The
embedded
packet
processing engines enable their full operation
with a very simple MCU as a radio system.
Auto re-transmission and auto acknowledge
give reliable link without any MCU
interference.
RFM73 operates in TDD mode, either as a
transmitter or as a receiver.
The RF channel frequency determines the
center of the channel used by RFM73. The
frequency is set by the RF_CH register in
register bank 0 according to the following
formula: F0= 2400 + RF_CH (MHz). The
SPI
Interface
RFP
RFN
FM
Demodulator
Rx FIFO
Data Slicer
CSN
SCK
MOSI
MISO
IRQ
CE
Integrated
TDD RF
Transceiver
Power
Management
Packet
Processing &
State Control
Register
banks
FM Modulator
Gaussian
shaping
Tx FIFO
Figure 1 RFM73 Chip Block Diagram
Page 3 of 27
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RFM73
2
Abbreviations
ACK
ARC
ARD
CD
CE
CRC
CSN
DPL
FIFO
GFSK
GHz
LNA
IRQ
ISM
LSB
MAX_RT
Mbps
MCU
MHz
MISO
MOSI
MSB
PA
PID
PLD
PRX
PTX
PWD_DWN
PWD_UP
RF_CH
RSSI
RX
RX_DR
SCK
SPI
TDD
TX
TX_DS
XTAL
Acknowledgement
Auto Retransmission Count
Auto Retransmission Delay
Carrier Detection
Chip Enable
Cyclic Redundancy Check
Chip Select Not
Dynamic Payload Length
First-In-First-Out
Gaussian Frequency Shift Keying
Gigahertz
Low Noise Amplifier
Interrupt Request
Industrial-Scientific-Medical
Least Significant Bit
Maximum Retransmit
Megabit per second
Microcontroller Unit
Megahertz
Master In Slave Out
Master Out Slave In
Most Significant Bit
Power Amplifier
Packet Identity Bits
Payload
Primary RX
Primary TX
Power Down
Power Up
Radio Frequency Channel
Received Signal Strength Indicator
Receive
Receive Data Ready
SPI Clock
Serial Peripheral Interface
Time Division Duplex
Transmit
Transmit Data Sent
Crystal
Page 4 of 27
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