3cbc7_Compal_LA-6847P.pdf

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PWWAA
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Delhi
LA-6847P REV 1.0 Schematic
Intel Processor(ARD) /PCH(HM55)
2010-10-07 Rev 1.0
2
3
3
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4
Security Classification
Issued Date
2010/09/05
Compal Secret Data
Deciphered Date
2011/09/05
Title
Compal Electronics, Inc.
SCHEMATICS,MB A6847
Document Number
Rev
B
Sheet
E
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
4019AP
Tuesday, December 28, 2010
1
of
52
Date:
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B
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E
Compal Confidential
Model Name : PWWAA
File Name : LA-6847P
1
Intel Arrandale
Fan Control
APL5607
page 6
Clock Generator
RTM890N-631-GRT
page 21
1
PCIE-Express 16X 2.5GHz
rPGA-988
page 5,6,7,8,9,10
Memory BUS(DDRIII)
200pin DDRIII-SO-DIMM X2
Dual Channel
BANK 0, 1, 2, 3
page 11,12
1.5V DDRIII 800/1066 MT/s
VGA (DDR3)
ATI PARK XT S3 64bit with 512MB
page 13,14,15,16,17,18,19,20
DMI X4
2.5GHz
USB port 0,1
page 32
USB
2IN1
USB
5V 480MHz
RTS5137
USB port 10
page 35
Int. Camera
USB port 11
page 21
LCD Conn.
2
page 21
CRT
page 22
USB
5V 480MHz
PCIeMini Card
WiMax
USB port 13
page 33
2
PCIe 1x
1.5V 2.5GHz(250MB/s)
PCIeMini Card
WLAN
PCIe port 1
page 33
Intel Ibex Peak
SATA port 1
5V 3GHz(300MB/s)
SATA HDD0
SATA ODD
page 32
RJ45
RTL8105E-GR 10/100M
PCIe port 0
page 34
PCIe 1x
1.5V 2.5GHz(250MB/s)
page 34
BGA-951
SATA port 4
5V 3GHz(300MB/s)
page 32
PCI
3
3
page 23~31
LPC BUS
3.3V 33 MHz
HD Audio
3.3V/1.5V 24MHz
Power/B conn.
page 40
RTC CKT.
page 23
HDA Codec
SPI ROM
page 23
Debug Port
page 39
ENE KB926 E0
page 38
ALC259-GR
page 36
DC/DC Interface CKT.
page 41
Touch Pad
Power Circuit DC/DC
4
page 40
Int.KBD
EC ROM
page 39
page 39
Int.
MIC CONN
(LVDS CONN)
page 21
Ext.
MIC CONN
page 37
HP CONN
page 37
SPK CONN
page 37
4
page 42~50
Security Classification
Issued Date
2010/09/05
Compal Secret Data
Deciphered Date
2011/09/05
Title
Compal Electronics, Inc.
SCHEMATICS,MB A6847
Document Number
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
C
D
4019AP
Tuesday, December 28, 2010
E
Rev
B
Sheet
2
of
52
Date:
5
4
3
2
1
DESIGN CURRENT 0.1A
+3VL
B+
Ipeak=5A, Imax=3.5A, Iocp min=7.9
DESIGN CURRENT 5A
+5VALW
SUSP
N-CHANNEL
SI4800
D
DESIGN CURRENT 4A
+5VS
D
Ipeak=5A, Imax=3.5A, Iocp min=7.7
DESIGN CURRENT 5A
UP6182CQAG
SUSP#
DESIGN CURRENT 2A
+3VALW
APL5930
SUSP
+1.8VS
N-CHANNEL
SI4800
P-CHANNEL
AO3413
VR_ON
LCD_ENVDD
DESIGN CURRENT 4A
+3VS
+LCD_VDD
DESIGN CURRENT 1.5A
DESIGN CURRENT 48A
ISL62883HRZ
SUSP#
DESIGN CURRENT 15A
+CPU_CORE
C
C
TPS51218DSCR
VTTP_EN
+VGA_CORE
Ipeak=18A, Imax=12.6A, Iocp min=19.8
DESIGN CURRENT 18A
APW7138NITRL
SUSP#
+VTT
Ipeak=7A, Imax=4.9A, Iocp min=7.7
DESIGN CURRENT 7A
RT8209BGQW
SUSP#
+1.05VS
Ipeak=15A, Imax=10.5A, Iocp min=16.5
DESIGN CURRENT 15A
+1.5V
+1.5V_CPU
RT8209BGQW
SUSP
N-CHANNEL
FDS6676AS
SUSP
B
DESIGN CURRENT 2A
N-CHANNEL
FDS6676AS
0.75VR_EN#
DESIGN CURRENT 2A
+1.5VS
B
DESIGN CURRENT 1.5A
G2992F1U
+0.75VS
A
A
Security Classification
Issued Date
2010/09/05
Compal Secret Data
Deciphered Date
2011/09/05
Title
Compal Electronics, Inc.
SCHEMATICS,MB A6847
Document Number
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
2
4019AP
Tuesday, December 28, 2010
Sheet
1
Rev
B
3
of
52
Date:
A
B
C
D
E
Voltage Rails
( O MEANS ON
X MEANS OFF )
+RTCVCC
+B
+5VL
+3VL
+5VALW
+3VALW
+VSB
+1.5V
+5VS
+3VS
+1.5VS
+VGA_CORE
+CPU_CORE
+VTT
+1.05VS
+1.8VS
+1.1VS
1
power
plane
BTO Option Table
Function
description
explain
BTO
Function
description
Camera & Mic
Camera & Mic
Camera & Mic
CAM@
MINI PCI-E SLOT
SLOT1
WLAN/BT
LAN
LAN
10/100M
1
State
+0.75VS
S0
S1
2
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
explain
BTO
Function
description
explain
BTO
S3 Power Saving
S3 Power Saving
Power Saving
S3
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery
don't exist
X
X
X
X
2
X
X
X
X
X
X
X
PCH SM Bus Address
Power
+3VS
3
Device
DDR SO-DIMM 0
DDR SO-DIMM 1
Clock Generator
New Card
WLAN/WIMAX
Clock Generator
HEX
A0 H
A4 H
D2 H
Address
1010 0000 b
1010 0100 b
1101 0010 b
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
SIGNAL
3
+3VS
+3VS
+3VS
+3VS
+3VS
SLP_S3# SLP_S4# SLP_S5#
HIGH
HIGH
LOW
LOW
LOW
LOW
HIGH
HIGH
HIGH
LOW
LOW
LOW
HIGH
HIGH
HIGH
HIGH
LOW
LOW
EC SM Bus1 Address
Power
+3VL
EC SM Bus2 Address
Power
+3VS
S5 (Soft OFF)
G3
Device
Smart Battery
HEX
16 H
Address
0001 0110 b
Device
PCH
HEX
96 H
Address
1001 0110 b
4
Power
Device
HEX
Address
4
Security Classification
Issued Date
2010/09/05
Compal Secret Data
Deciphered Date
2011/09/05
Title
Compal Electronics, Inc.
SCHEMATICS,MB A6847
Rev
B
Sheet
E
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019AP
4
of
52
Date:
Tuesday, December 28, 2010
A
B
C
D
5
4
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2
1
JCPUB
1
R1
1
R2
1
R4
1
R3
+VTT
D
CLOCKS
H_COMP3 AT23
2
20_0402_1%
H_COMP2 AT24
2
20_0402_1%
H_COMP1 G16
2
49.9_0402_1%
H_COMP0 AT26
2
49.9_0402_1%
TP_SKTOCC#
CATERR#
AH24
AK14
COMP3
COMP2
COMP1
COMP0
SKTOCC#
CATERR#
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
A16
B16
AR30
AT30
E16
D16
A18
A17
CLK_CPU_BCLK 28
CLK_CPU_BCLK# 28
MISC
MISC
CLK_PEG 24
CLK_PEG# 24
+VTT
PAD
1
R18
T41
Unused by Clarksfield rPGA989
PM_EXTTS#0
R15
2
2
1 10K_0402_5%
1 10K_0402_5%
D
2
49.9_0402_1%
THERMAL
THERMAL
PM_EXTTS#_R R13
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
F6
SM_DRAMRST#_CPU
R6 1
R7 1
R8 1
2
R12
2 100_0402_1%
2 24.9_0402_1%
2 130_0402_1%
1
0_0402_5%
DDR3 Compensation Signals
Layout Note:Please these
resistors near Processor
28
PECI
AT15
PECI
Power has removed VR_TT#
+VTT
1
R9
H_PROCHOT#_D
2
68_0402_5%
AN26
PROCHOT#
AL1 SM_RCOMP_0
AM1 SM_RCOMP_1
AN1 SM_RCOMP_2
AN15 PM_EXTTS#0
AP15 PM_EXTTS#_R
DDR3
MISC
PM_EXT_TS#[0]
PM_EXT_TS#[1]
PM_EXTTS# 11,12
28 H_THERMTRIP#
AK15
THERMTRIP#
PRDY#
PREQ#
AP26
AL15
2
0_0402_5%
28 H_PWRGOOD
R28 @
1.1K_0402_1%
1
25 DRAMPWROK
46 VTTPWROK_CPU
DRAMPWROK
1 H_PWRGOOD1_R
R25
AN14
AN27
AK13
RESET_OBS#
PM_SYNC
VCCPWRGOOD_1
VCCPWRGOOD_0
SM_DRAMPWROK
VTTPWRGOOD
TAPPWRGOOD
RSTIN#
TCK
TMS
TRST#
TDI
TDO
TDI_M
TDO_M
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
AT28
AP27
AN28
AP28
AT27
AT29
AR27
AR29
AP29
AN25
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
XDP_TDO
XDP_TDI_M
XDP_TDO_M
T45
T44
T43
T42
PAD
PAD
PAD
PAD
2
R312
1
1K_0402_5%
+3VS
S
S
D
SM_DRAMRST#_CPU
1
3
1
SM_DRAMRST# 11,12
JTAG & BPM
R127
100K_0402_5%
2
2
Q41
BSS138_NL_SOT23-3
RST_GATE 28
C301
0.047U_0402_16V7K
G
PWR MANAGEMENT
25
+1.5V_CPU
PMSYNCH
C301, Q41,
R127 from PS@
to mount
C
2
C
XDP_DBRESET# 25
Add on 10/28
XDP_TDO_M
1
R23
XDP_TDI_M
2
0_0402_5%
DRAMPWROK
1
VTTPWROK_CPU AM15
AM26
XDP_TDO
750_0402_1%
R29
2
1
R22
2
51_0402_5%
+VTT
27 BUF_PLT_RST#
BUF_PLT_RST#_R
1.5K_0402_1%
R30
R31
750_0402_1%
AL14
IC,AUB_CFD_rPGA,R0P9
@
R28 unmount for NPS@
R29 always mount for PS@
B
For S3 CPU Power Saving
place near JCPU
+3VALW
1000P_0402_50V7K
1000P_0402_50V7K
2
2
1 C487
DRAMPWROK
5
U16
O
IN2
G
3
4
R33
DRAMPWROK
1.5K_0402_1%
1
C163
VTTPWROK
2
0.1U_0402_16V4Z
1
2
B
1 C488 VTTPWROK_CPU
41,46 VTTPWROK
1
2
IN1
P
SN74AHC1G08DCKR_SC70-5
0715 --> change BOM structure to mount
A
A
Security Classification
Issued Date
2010/09/05
Compal Secret Data
Deciphered Date
2011/09/05
Title
Compal Electronics, Inc.
SCHEMATICS,MB A6847
4019AP
Sheet
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Rev
B
5
of
52
Date:
Tuesday, December 28, 2010
5
4
3
2

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